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The micro controller 8051 instruction set include 110 instructions,49 of which are single byte instruction , 45 are two bytes instruction and 17 are three byte instructions and 17 are three byte instructions.The instruction format consists of a function mnemonic followed by destination and source field.
All the instruction of micro controller 8051 may be classified based on the functional aspect are given below
1.Data transfer group
2.arithmetic group
3.Logical group
4.Bit manipulation group
5.Branching or control transfer group
we deal about addressing methods in the previous post.
DATA TRANSFER - GENERAL PURPOSE
Data transfer operations are divided into three classes general purpose, accumulator specific ,Address-object , Normally none of these operations affect the PSW flag settings except a POP or MOV directly to the PSW.
MOVe perform a byte or bit transfer from the specified source operand to the destination operand.
Execution of PUSH instruction first increments the Sp register and then transfer a byte from the specified source to the stack memory location addressed by SP.
POP instruction transfer a byte from the stack memory location pointed by SP to the destination and then decrements SP.
DATA TRANSFER-ACCUMULATOR SPECIFIC
XCH exchange the specified source byte with accumulator.
XCHD exchange the lower-order nibble of the specified source byte with the low-order nibble
pf the accumulator.Higher nibble of the accumulator and source byte remain same.
MOVX perform a byte transfer from the external data memory address is pointed by DPTR
( 16 bit address) or the internal pointer R0 or R1 ( 8 bit address ) register.
MOVC moves a byte from program memory to the accumulator . The accumulator is used as an index
into 256 byte table pointed to by the base register DPTR or PC .
The required byte is transferred to the accumulator.
DATA TRANSFER -ADDRESS TRANSFER
MOV DPTR , # address initializes the given immediate address into pair of destination register,
DPH and DPL.
ARITHMETIC INSTRUCTION
The 8051 micro-controller has four mathematical operations.8 bit operations using unsigned arithmetic
are supported directly .The overflow flag helps the user to do addition and subtraction to serve for
both signed and unsigned binary numbers.Arithmetic operation can also be performed directly on BCD.
Carry flag helps to indicate that the result is not an 8 bit instead it is an 9 bit in addition process.
The same carry flag helps us to indicates that the result is in two's compliment from the subtraction process.
ADDITION
ADD instruction adds accumulator content to the specified source content and returns the result to a
accumulator.Based on the result , the carry flag is set or reset.
ADDC ( add with carry ) instruction adds accumulator content, the specified source content and thr carry flag
and returns the result accumulator .Based on the result the carry flag is set or reset.
DA ( decimal adujst for BCD addition ) correct the sum which result from the binary addition of two two digit
decimal operands.The packed decimal sum formed by the instruction DA is returned to accumulator .The carry flag is
set if the result is greater than 99,otherwise i=it is cleared.
INC ( increment ) adds one to the specified source content and the result is put in the same source register.
SUBTRACTION
SUBB ( subtract with borrow)instruction subtracts the specified source content and the carry flag content from the accumulator , the result is transferred into accumulator .Based on the result the carry flag is set or reset .If the result is positive , the carry flag is set then the result is available in two's compliment form.
DEC ( decrement ) instruction subtracts one from the specified source and returns the result to same source.
MULTIPLICATION
MUL instruction perform an unsigned multiplication of the accumulator content and B register content .It returns a double byte result . B register receives the high order result byte and accumulator receives the low order result.This carry flag is always cleared.
DIVISION
DIV instruction performs an unsigned division of the accumulator content by the B register . The quotient is returned to accumulator and remainder to the B register. The carry flag is always cleared . Division by ZERO leaves indeterminate data in accumulator and B registers, It will set over flow flag.
LOGIC INSTRUCTIONS
the micro-controller 8051 performs basic logic operations on both byte and bit operands.
BIT OPERATIONS
CLR instruction clears ( made as 0 ) the accumulator or the specified addressable bit.
SETB instruction set ( made as 1 ) any directly addressable bit.
CPL instruction set is used to compliment the contents of the accumulator or directly addressable bit without affecting any flags.
Rotate Left , Rotate Left through Carry, Rotate Right. Rotate Right Carry and SWAP instructions are the rotate operations that can be performed on accumulator.
TWO OPERAND OPERATIONS
ANL ( AND logic ) performs bit wise logical AND of with two specified source operands and returns the result to the specified location of the first operand.
ORL ( OR logic ) perform bit wise logical OR of with two specified source operand and returns the result to the specified location of the first operand.
CONTROL TRANSFER INSTRUCTION
There are three type of control transfer instructions
*1* Un-conditional calls, Returns and jumps.
*2* Conditional Jumps and.
*3*Interrupts
All branching / control transfer operations cause, some upon a specified condition , the program
execution to continue at a non-sequential locations in program memory
UNCONDITIONAL CALLS,RETURNS AND JUMPS
Unconditional calls , Return and jumps transfers control from the current position of main/sub program to the new target address.The program counter is loaded with the address of called program.
ACALL ( Absolute CALL) and LCALL ( Long CALL ) push the address of the next instruction to be executed onto the stack memory and then transfer control to target address.ACALL is a two byte instruction used when the target address is in current 2K page . LCALL is a three byte instruction that addresses the full 64K program memory space.
RET transfers the control back to the called program by getting the return address saved on the stack by a previous call operation and decrements the SP register by two to adjust the SP for the popped address .Always the SP will pint , Where the last data is available.
SJMP,AJMP and LJMP transfer control to the target operand.The operation of AJMP and LJMP are similar to ACALL and LCALL .The short Jump ( SJMP)instruction provides transfer within a 256 byte range centered about the starting address of the next instruction.
JMP @A+DPTR perform a jump relative to the DPTR register. Hence DATA pointer holds the base address. The content in accumulator is used as the offset address.The effective destination address is sum of accumulator and DPTR register .Jump can be anywhere in the program memory space.
CONDITIONAL JUMP's
Conditional JUMPS perform jump when a specified condition is satisfied .The destination will b within a 256 byte range centered about the starting address of the next instruction.
JZ instruction perform a jump if accumulator is ZERO.
JNZ instruction perform a jump if the accumulator content is not ZERO.
JC instruction perform a jump if the carry flag is SET
JNC instruction perform a jump if the carry flag is not SET.
JB instruction perform a jump if the direct addressed bit is SET.
JNB instruction perform a jump if the direct addressed bit not SET.
JBC instruction perform a jump if the direct addressed bit is set and before jump the direct addressed bit is cleared.
CJNE compare the first operand to the second operand and performs a jump if they are not equal .Carry flag is set if the first operand is less than the second,otherwise carry flag is cleared
.Four instruction are available.
DJNZ decrements the specified source operand and returns the result to the operand . JUMP is performed if the result is not ZERO.The source operand of the DJNZ instruction may be any byte in the internal data memory .Register direct or indirect addressing may be used as the source operand.
INTERRUPT RETURNS
RETI transfers control as similar to RET , but additionally enable interrupts of the current priority level.
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